This course introduces students to design trends in deep submicron (DSM) era, including scaling trend, clock cycle and power issues; Role of interconnects in contemporary SoC Design; System-on-Chip and platform-based design ndash; IP-based design and reusability, Multiprocessor SoC platform design, 3D integration, on-chip optical and wireless communication, Design for testability (DFT), Test Access Mechanism (TAM), concept of core-based test amp; IEEE P1500 standard for SoC test; Importance of Power and Low power SoC design methodology. A course project using state-of-the-art computer aided design (CAD) tools in VLSI gives students hands-on experience of the most current technology/process.