Memory Design and Testing

The course gives a detailed view of Memory Design topics from SRAM cell design and constraints to

1. Memory Hierarchy and Types
2. SRAM Cell Optimization and Design Metrics
3. Memory Read/ Write Path - Address to Q path (Decoders to Sense Amplifiers and associated timing circuits)
4. Case Studies:
   • High Speed Memory
   • Low Voltage Memory
5. DRAM array design and related constraints (refresh rate)
6. DRAM interface – address decoding; pipelining; date interface; charge pumps
7. Non Volatile Memory Cell – Basic Principle and Operation
8. Read/ Program/ Erase Path (including)
9. Case Study
10. Reliability Considerations of NVM
11. Testability, Yield and Repair

• Evaluate and Design SRAM Cell
• Evaluate Memory Architecture
• Design of Data Path and Control circuits for (Non Volatile) Memory operations
• Concept of Yield and trade-off with performance
• Overview of Memory Test Requirements and Test Flow