Hardware Software Co Design

 Hardware Software Co Design

The FDP on Hardware-software codesign was organized from 18th to 23rd December 2018 at IIIT-Delhi. Participants joined from various institutes all over the country (IITs, IIITs, NITs, BITS and other private universities). The programme covered various projects from scratch like door lock design, a video game using VGA protocol, codesign between the ARM core and the FPGA based on AXI protocol. All resources and lab handouts were shared with the participants. Two hands-on sessions were also organized by trainers from Coreel and MathWorks. On last day a machine learning based algorithm was implemented on the Zedboard using two different approaches (Verilog and SDSoC flow). A demo of a CNN doing real-time image classification on Zedobard was also presented to motivate the participants.

Total no of Participants: 37
No of days: 6

Valuable Feedback

  1. It was a very good program. It was clear at every point what exactly was going on. The sessions from IIIT delhi faculty and TAs was very well designed. (Chetan Kumar-Bits Pilani)
  2. Great work !! Hope to see more workshops like these in the future, so that more people benefit from this. (Issaar Ahmad- IIT Delhi)
  3. The sessions were pretty good and TA's were really helpful regarding doubt clearance in hands on sessions. (Abhishek Jena- IIT Bhuvneshwar)
  4. Very valuable workshop conducted by Dr. Sumit Darak. All TAs are very supportive. (Kaushal Kumar- IIT Patna)

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