Dr. Anuj Grover has obtained Ph.D. from IIT Delhi in 2015, MS (Electronic Circuits and Systems) from UCSD in 2003, and B Tech (EE) from IIT Delhi in 2000. Prior to joining IIIT-Delhi, he had been working as Principal Engineer - Member of Technical Staff at STMicroelectronics, Greater NOIDA. In more than 18 years of experience in the semiconductor industry as a Memory Designer, he has worked on a wide range of technologies like Bulk CMOS, BCD, Imaging, UTBB-FDSOI CMOS, e-NVM across a range of feature sizes from 22nm to 0.35um. He has more than 50 publications across IEEE journals and conferences.

He has strong interest in Systematic Innovation and is trained on applying Theory of Inventive Problem Solving (TRIZ). He has been awarded TRIZ Level-3 Certification from MIT and MATRIZ. He has also been certified by World Intellectual Property Organization (WIPO) on application of TRIZ for patents. He has more than 20 granted patents and more than 10 patent applications in different stages of filing.

His current research interests include Sustainability in Circuits and Systems; In-Memory Compute for edge computing; Intelligent Product Development; Safety and Security in hardware; and Error Resilient Energy Efficient Systems.