Executive Summary
IIIT Delhi and IEEE CASS-CSS Delhi Chapter present 6- weeks Online Summer School on VLSI for Employability Enhancement for Faculty, recent graduates working in industry, and graduating students. Facilitated by stellar faculty with decades of teaching and industry work experience, this refresher program includes 180 fast-paced contact hours including theory and lab sessions. The program has been highly acclaimed in the previous runs as a perfect launchpad for a successful career in VLSI Circuits and System Design.
Schedule
Week | Subject | Content | Tools/ Languages Used in Labs |
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Week-1 (20-24 June) | Digital VLSI and Memory Design (Dr. Anuj Grover) |
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Week-2 (27 June – 1 July) | Analog IC Design (Prof. G.S. Visweswaran) |
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Week-3 (4-8 July) | Mixed Signal Design (Prof. S. S. Jamuar, Dr. Rakesh Palani) |
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Week-4 (11-15 July) | Computer Architecture & SoC (Dr. Sujay Deb) |
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Week-5 (18-22 July) | ASIC Design & Verification (Dr. Sneh Saurabh) |
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Week-6 (25-29 July) | Digital System Design (Dr. Sumit J. Darak) |
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Registration Rates $*
Indian Students | Indian Faculty/ International Students | Partner Industry Participant | Industry / International Participants | |
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IEEE Member | 2000 | 3200 | 6400 | 8000 |
Others^ | 2500 | 4000 | 8000 | 10000 |
IEEE Member | 6000 | 9600 | 19200 | 24000 |
Others^ | 7500 | 12000 | 24000 | 30000 |
$ 10% Early Bird discount for first 100 registrations or until * rates are inclusive of GST ^ Additional 10% discount on group registrations of 4 or more |
Last updated: 24-05-2022